J.J.G.M. van der Tol, J. Pello, S.P. Bhat, Y. Jiao, D. Heiss, G. Roelkens, H.P.M.M. Ambrosius, and M.K. Smit
SPIE Photonics West 2014 (Proc. SPIE 8988, Integrated Optics: Devices, Materials, and Technologies XVIII, 89880M), 1-6 Feb 2014, San Francisco, USA.
Publication year: 2014

Abstract:

A new photonic integration technique is presented, based on the use of an indium phosphide membrane on top of a silicon chip. This can provide electronic chips (CMOS) with an added optical layer (IMOS) for resolving the communication bottleneck. A major advantage of InP is the possibility to integrate passive and active components (SOAs, lasers) in a single membrane. In this paper we describe progress achieved in both the passive and active components. For the passive part of the circuit we succeeded to bring the propagation loss of our circuits close to the values obtained with silicon; we achieved propagation loss as low as 3.3 dB/cm through optimization of the lithography and the introduction of C60 (fullerene) in an electro resist. Further we report the smallest polarisation converter reported for membrane waveguides ( <10 μm) with low-loss (< 1 dB from 1520- 1550 nm), > 95% polarisation conversion efficiency over the whole C-band and tolerant fabrication. We also demonstrate an InP-membrane wavelength demultiplexer with a loss of 2.8 dB, a crosstalk level of better than 18 dB and a uniformity over the 8 channels of better than 1.2 dB. For the integration of active components we are testing a twin guide integration scheme. We present our design based on optical and electrical simulations and the fabrication techniques.

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